What to Pay Attention to The Design of High-density High Frequency PCB?
The rapid development of science and technology has decided that all enterprises should be enhanced, which PCB depends on science and technology, naturally shall not lag behind, and thus the layout of the high frequency PCB has also become the design of the PCB high frequency board needs to be explored at the time of the key points. Next Xinchenger Electronics for everyone to introduce the layout of high frequency PCB design points of attention.
High Frequency PCB Design Layout Points of Attention:
A. High frequency circuits tend to have a high degree of integration and high-density PCB design layout. The use of multilayer board is both necessary for PCB design and wiring, but also an effective means of reducing interference.
B. High-speed circuit devices between the pins of a high-speed circuit device, the better. Leads for high frequency circuit PCB design wiring are preferably solid, need to be wound, and can be folded in 45° folded lines or arcs. To fulfill this requirement, external transmission and mutual coupling of high frequency signals can be reduced.
C. The shorter the leads between the pins of the high frequency circuit device, the better.
D. High frequency circuit device pins between wiring layers between pins of the HF circuit device, the better. The term "minimize layer crossings" refers to the use of as few vias as possible in the connection of components. It has been estimated that a single vias can result in a distribution capacitance of approximately 0.5 PF. Reducing the number of vias Can greatly improve the speed.
E. High frequency circuit PCB design and wiring should pay attention to the parallel lines of the signal line introduced by the "cross-talk". If you can not avoid parallel distribution, you can arrange a large area of parallel signal lines on the back of the "ground" to greatly reduce interference. Parallel alignments in the same layer are almost unavoidable, but in two adjacent layers the alignments must be oriented perpendicular to each other. 6. Encircle particularly important signal lines or local unit grounding measures, i.e. draw the outer contour of the selected object. With this function, the so-called "packet" processing can be performed automatically on the selected important signal lines. Of course, for high-speed systems, it is also useful to use this function for local processing of components such as clocks.
F. The various types of signal lines can not form a loop, and the ground line can not form a current loop.
G. Should be placed near each integrated circuit block a high frequency decoupling capacitor.
H. The analog ground line and digital ground line connected to the common ground line, should use high frequency turbulence link. In the actual assembly of high frequency turbulence chains, high frequency ferrite beads through the center hole are often used and are usually not represented in circuit schematics, and the resulting netlist does not include such components, and PCB design wiring will ignore their presence. In response to this reality, it can be used as an inductor in the schematic and the component package is defined separately in the PCB component library and manually moved to a suitable location near the convergence point of the common ground wire prior to PCB design routing.
I. Analog and digital circuits should be laid out separately. After independent PCB design wiring, power and ground should be connected to a point to avoid mutual interference.
J. Before connecting the DSP chip external program memory and data memory to the power supply, filter capacitors should be added and placed as close as possible to the chip power supply pins to filter out power supply noise. In addition, it is recommended to shield around the DSP and off-chip program memory and data memory to reduce external interference.
K. Off-chip program memory and data memory should be placed as close as possible to the DSP chip. At the same time, the layout should be reasonable so that the length of the data and address lines are basically the same, especially when there are multiple memories in the system, the clock lines of each memory should be considered. The clock inputs are equidistant, or a separate programmable clock driver chip can be added.
For DSP systems, external memories with the same access speed as the DSP should be selected, otherwise the high-speed processing capability of the DSP will not be fully utilized.DSP instruction cycles are nanoseconds, so the most common problem in DSP hardware systems is high frequency interference.
Therefore, special attention should be paid to the address and data lines when making the printed circuit board (PCB) of the DSP hardware system. The signal lines should be wired correctly and reasonably. When wiring, try to keep the high frequency lines short and thick, and away from signal lines that are susceptible to interference, such as analog signal lines. When the circuitry around the DSP is more complex, it is recommended that the DSP and its clock circuitry, reset circuitry, off-chip program memory, and data memory be formed into a minimal system to minimize interference.
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